1. Field of the Invention
The present invention relates to a printed wiring board wherein a conductor pad with larger area than the area of an opening such as a photovia land and a through hole land is provided between plural openings where no conductor exists in a conductive pattern which is formed in a mesh on a single side or double sides of a base material and each opening is filled with a filling resin layer, particularly relates to a reliable printed wiring board wherein a circuit pattern provided on the upper face of an interlayer insulating layer formed on the printed wiring board and a conductor pad can be securely connected without causing disconnection by substantially equalizing the quantity of resin with which each opening is filled throughout the printed wiring board.
The present invention also relates to a printed wiring board wherein a via hole opposite to a conductor pad or a land is provided by forming a photosensitive interlayer insulating layer on a base material on which a predetermined circuit pattern including a metallic area with large area such as a power plane and a ground plane is formed and developing the interlayer insulating layer after it is exposed via a mask film, particularly relates to a printed wiring board wherein light dispersed by a metallic area which is a power plane or a ground plane is prevented from being incident to an interlayer insulating layer which exists under the mask area of a mask film when a via hole is formed opposite to a conductor pad or a land by exposing the interlayer insulating layer via a mask film, as a result, the metallic area is securely exposed and simultaneously, a via hole can be formed and a manufacturing method thereof.
Further, the present invention relates to a multilayer printed wiring board wherein a connection pad formed on a core material and a pattern on an interlayer insulating layer provided on the core material are connected via a via hole and a connection pad formed on an interlayer insulating layer and a pattern on another interlayer insulating layer are connected via a via hole, particularly relates to a reliable multilayer printed wiring board wherein when a photosensitive interlayer insulating layer is exposed with a mask film stuck on it and developed by devising the shape of a connection pad formed on a core material or on an interlayer insulating layer so as to form a via hole, the via hole and the connection pad can be stably connected even if misregistration occurs between the connection pad and the mask film.
2. Description of Related Art
(1) Heretofore, for a multilayer printed wiring board for example, a copper-clad laminate 200 on which a copper layer 202 is clad on a single side (or double sides) of an electrical insulating core material 201 is used for a base material as shown in FIG. 28. A conductor circuit is formed in such a copper-clad laminate 200 by laminating a photosensitive dry film where the pattern of the conductor circuit is printed on the surface of the copper layer 202 and performing etching processing after exposure and development and FIG. 29 shows such a copper-clad laminate 200 where the conductor circuit 203 is formed from the copper layer 202.
When the conductor circuit 203 is formed in the copper-clad laminate 200, an exposed area (an opening) 204 in which the core material 201 is exposed between the conductor circuits 203 is simultaneously formed as shown in FIG. 29. A resin layer 205 is formed in such an exposed area 204 as shown in FIG. 30 by applying and hardening electrical insulating filling resin and after the filled resin layer 205 is hardened, the respective surfaces of the conductor circuit 203 and the filled resin layer 205 are smoothed by polishing so as to prevent the failure of exposure and development of a conductor circuit 207 shown in FIG. 33 formed on the conductor circuit 203.
However, as shown in FIG. 31, when area required by a pad 203L to which the upper conductor circuit 207 shown in FIG. 33 is connected cannot be secured by the conductor circuit 203 in a mesh if a pattern formed by the conductor circuits 203 formed in the copper-clad laminate 200 is in a mesh (often in the case of a power pattern and a ground pattern), the area of the opening of the exposed area 204L around the pad 203L is reduced so as to secure the above area required by the pad 203L and therefore, the area of the opening of the exposed area 204L around the pad 203L is smaller than that of another exposed area 204.
As a result, the quantity of resin which can fill the exposed area 204L around the pad 203L is smaller than that of resin which can fill another exposed area 204 and when the exposed areas 204 and 204L are filled with resin, the quantity of filled resin overflowing from the exposed area 204L around the pad 203L is more than that overflowing from another exposed area 204 and even if the respective surfaces of the conductor circuit 203 and the filled resin layer 205 are polished so that they are smooth after the filled resin is hardened to be the filled resin layer 205, the filled resin 205L is left on the pad 203L as shown in FIG. 32 which is a sectional view viewed along a line B-Bxe2x80x2 in FIG. 31.
As shown in FIG. 33, an electrical insulating adhesion layer 206 is laminated on the conductor circuit 203 in a state in which the filled resin 205L is left on the pad 203L and when the conductor circuit 207 formed on the conductor circuit 203 is connected to the pad 203L which is a part of the conductor circuit 203 via a via hole P formed in the adhesion layer 206, there is a problem that the failure of conduction is caused between the conductor circuit 203 and the conductor circuit 207 because the electrical insulating filled resin 205L exists between the pad 203L and the conductor circuit 207.
The mesh pattern formed by the conductor circuits 203 may be formed on an adhesive layer for electroless plating which also functions as the interlayer insulating material of a built-up type multilayer printed wiring board. In this case, in the mesh pattern the area of the opening of the exposed area 204L around the pad 203L is reduced. A plating resist is provided to this opening 204L, the reduction of the area causes the reduction of contact area with the adhesive layer for electroless plating and also causes the peeling of the plating resist and the interlayer insulating material formed on it.
(2) Heretofore, for a printed wiring board provided with a via hole, a variety of printed wiring boards are proposed. Referring to FIGS. 34 and 35, a method of manufacturing this type of printed wiring board will be described below. FIG. 34 is a sectional view showing a base material and FIG. 35 is a plan showing the base material.
To manufacture a printed wiring board 220 shown in FIG. 38, first, a base material 221 shown in FIGS. 34 and 35 is produced. The base material 221 is produced by performing predetermined etching after a metallic area 222 with large area such as a power plane and a ground plane, a connecting pad 223 with normal area and copper foil which is to be a predetermined circuit pattern 224 on a copper-clad laminate formed by laminating copper foil on a single side or double sides are coated with an etching resist.
Afterward, an interlayer insulating layer 225 shown in FIG. 36 is formed by applying photosensitive resin on the base material 221 together with the metallic area 222, the connecting pad 223 and the circuit pattern 224. Further, after a mask film 227 is exposed in a state in which it is stuck on the interlayer insulating layer 225 with a predetermined mask area 228 shown in FIG. 37 formed in the mask film 227 corresponding to the metallic area 222 and the connecting pad 223, a via hole 226 is formed corresponding to the metallic area 222 and the connecting pad 223. Afterward, a continuous circuit pattern 229 including the inside of each via hole 226 opposite to each metallic area 222 and each connecting pad 223 is formed on the interlayer insulating layer 225 by electroless plating and a printed wiring board 220 is produced.
However, if the printed wiring board 220 is produced according to the above procedure, the metallic area 222 is not completely exposed inside the via hole 226 formed in the metallic area 222 and the circuit pattern 229 formed inside the via hole and the metallic area 222 may be not connected. Referring to FIGS. 36 to 38, such a mechanism will be described below. FIG. 36 is a sectional view schematically showing a state in which the interlayer insulating layer 225 is formed on the base material 221, FIG. 37 is a sectional view showing a state in which the interlayer insulating layer 225 is exposed with the mask film 227 corresponding to the metallic area 222 and FIG. 38 is a sectional view of the printed wiring board 220 showing a state in which the via hole 226 is formed close to the metallic area 222 and the connecting pad 223.
As shown in FIG. 36, if the interlayer insulating layer 225 is formed by applying photosensitive resin on the base material 221, the photosensitive resin is relatively uniformed and has the thickness of L1 on the metallic area 222 because the metallic area 222 has large area and in the meantime, as the photosensitive resin is filled between the connecting pad 223 and the circuit pattern 224 or between the circuit patterns in the vicinity of the connecting pad 223 and the circuit pattern 224, the interlayer insulating layer 225 formed on the connecting pad 223 and the circuit pattern 224 has the thickness of L2 which is thinner than the thickness L1. Therefore, though the interlayer insulating layer 225 is formed on the metallic area 222 as shown in FIG. 36 so that it is thick (thickness L1), it is formed on the connecting pad 223 and each circuit pattern 224 so that it is thin (thickness L2).
If the via hole 226 is formed in the interlayer insulating layer 225 opposite to the metallic area 222 and the connecting pad 223 on the above base material 221, exposure is performed by radiating light from the upper side of the mask film 227 with the mask area 228 of the mask film 227 shown in FIG. 37 corresponding to each metallic area 222 and each connecting pad 223, however, as the thickness of the interlayer insulating layer 225 is different between on the metallic area 222 and on the connecting pad 223, the state of exposure of the interlayer insulating layer 225 on the metallic area 222 and that of exposure of the interlayer insulating layer on the connecting pad 223 inevitably differ. That is, as the interlayer insulating layer 225 on the connecting pad 223 is formed thinly, light is fully blocked off by the mask area 228, the interlayer insulating layer is not hardened and therefore, the connecting pad 223 is completely exposed in the via hole 226 formed in development. In the meantime, as the interlayer insulating layer 225 on the metallic area 222 is formed thickly, the resolution of exposure is short and therefore, the metallic area 222 is not completely exposed in the via hole 226 formed in development.
If the mask area 228 of the mask film 227 is arranged corresponding to the metallic area 222 and the interlayer insulating layer 225 is exposed to form the via hole 226 in the interlayer insulating layer 225, light is radiated from the upper side of the mask film 227 as shown in FIG. 37. Hereby, the interlayer insulating layer 225 on which light is radiated through the transparent part of the mask film 227 is hardened and in the meantime, as light is not radiated on the interlayer insulating layer 225 in a part in which light is blocked off by the mask area 228 of the mask film 227, the interlayer insulating layer is not hardened and is held unhardened.
However, as the metallic area 222 constitutes a power pattern and a ground pattern and has large area, light transmitted in the mask film 227 is dispersed on the metallic area 222 via the interlayer insulating layer 225 as shown in FIG. 37. Particularly, light transmitted in the mask film 227 and the interlayer insulating layer 225 in the vicinity of the mask area 228 is also dispersed on the metallic area 222, the dispersed light is also incident to the interlayer insulating layer 225 under the mask area 228 and as a result, the interlayer insulating layer 225 under the mask area 228 which should not be hardened properly is hardened. In such a case, even if development is performed after the above exposure, the hardened film of the interlayer insulating layer 225 is left on the metallic area 222. Therefore, as shown in FIG. 38, the hardened interlayer insulating layer 225 is left in the via hole 226 formed opposite to the metallic area 222 and the surface of the connecting pad is not completely exposed in the via hole 226. Hereby, even if the circuit pattern 229 is formed inside the via hole 226 and on the interlayer insulating layer 225 by electroless plating, there is a problem that such a circuit pattern 229 is not connected to the metallic area 222.
(3) Further, recently the miniaturization or speed-up of electronic equipment is promoted by the development of an electronic industry and densification by a fine pattern is required for a printed wiring board and a variety of wiring boards on which a large scale integrated circuit (LSI) is mounted. To achieve such densification, a multilayer printed wiring board called a built-up wiring board is most suitable.
Under such a situation, heretofore, the multilayer connecting structure of a multilayer printed wiring board is realized by connecting a connecting pad and a pattern via a via hole in order. Referring to FIG. 39, connection structure for connecting a connecting pad formed on the core material of a conventional multilayer printed wiring board and a pattern on an interlayer insulating layer provided on the core material via a via hole will be described below. FIG. 39 show connection structure for connecting a connecting pad formed on the core material of a conventional multilayer printed wiring board and a pattern on an interlayer insulating layer via a via hole, FIG. 39(A) is a plan showing a multilayer printed wiring board and FIG. 39(B) is a sectional view showing the multilayer printed wiring board.
As shown in FIGS. 39(A) and (B), a multilayer printed wiring board 300 is provided with a base material 301 which is a core material and a through hole 302 is formed in this base material 301. A conductor layer 303 is formed on the inner wall of the through hole 302 by through hole plating and a circular through hole land 304 connected to the conductor layer 303 is provided on the upper and lower sides of the base material 301. The through hole land 304 is connected to a circular connecting pad 306 on the upper surface of the base material 301 via a connecting pattern 305. A connecting pad 306 is also formed in a position separated from the through hole land 304 on the lower surface of the base material 301. Resin 307 is filled inside the through hole 302 or between the through hole land 304, the connecting pattern 305, the connecting pad 306 or other circuit pattern on the double sides of the base material 301.
An interlayer insulating layer 308 is provided on the upper surface of the base material 301, a via hole 310 inside which a conductor layer 309 is formed is provided in a position of the interlayer insulating layer 308 opposite to the connecting pad 306 and a circuit pattern 311 connected to the conductor layer 309 is formed. Hereby, the connecting pad 306 is connected to the circuit pattern 311 via the conductor layer 309 of the via hole 310. Similarly, an interlayer insulating layer 308 is formed on the lower surface of the base material 301, a via hole 310 provided with a conductor layer 309 inside is formed in a position of the interlayer insulating layer 308 opposite to the connecting pad 306, and the connecting pad 306 and the conductor layer 309 are connected each other. A plating resist layer 312 required when the conductor layer 309 and the circuit pattern 311 are formed by electroless plating is formed around the conductor layer 309 of the via hole 310 and the circuit pattern 311.
Next, referring to FIG. 40, connection structure for connecting a connecting pad formed on the interlayer insulating layer and a pattern on another interlayer insulating layer via a via hole will be described below. FIG. 40 show connection structure for connecting a connecting pad formed on an interlayer insulating layer in a conventional multilayer printed wiring board and a pattern on another interlayer insulating layer via a via hole, FIG. 40(A) is a plan showing a printed wiring board and FIG. 40(B) is a sectional view showing the printed wiring board.
As shown in FIGS. 40(A) and (B), a printed wiring board 320 is provided with a base material 321 which is a core material, a connecting pad 322 is formed on the upper surface of this base material 321 and a filled resin layer 323 is provided around the connecting pad 322. An interlayer insulating layer 324 is formed on the upper surface of the connecting pad 322 and the filled resin layer 323, a via hole 326 inside which a conductor layer 325 is formed is provided in a position of the interlayer insulating layer 324 opposite to the connecting pad 322 and a circuit pattern 327 connected to the conductor layer 325 is formed. A connecting pad 328 is formed at the end of the circuit pattern 327 as shown at the left end in FIGS. 40(A) and (B). Hereby, the connecting pad 322 on the base material 321 is connected to the connecting pad 328 on the interlayer insulating layer 324 via the conductor layer 325 of the via hole 326 and the circuit pattern 327. A plating resist layer 329 required when the conductor layer 325, the circuit pattern 327 and the connecting pad 328 are formed by electroless plating is formed around the conductor layer 325 of the via hole 326, the circuit pattern 327 and the connecting pad 328.
A further other interlayer insulating layer 330 is provided on the upper surface of the interlayer insulating layer 324, a via hole 332 inside which a conductor layer 331 is formed is provided in a position of this interlayer insulating layer 330 opposite to the connecting pad 328 and a circuit pattern 333 connected to the conductor layer 331 is formed. Hereby, the connecting pad 328 on the interlayer insulating layer 324 is connected to the circuit pattern 333 via the conductor layer 331 of the via hole 332. A plating resist layer 334 required when the conductor layer 331 and the circuit pattern 333 are formed by electroless plating is formed around the conductor layer 331 of the via hole 332 and the circuit pattern 333.
A method of forming the via hole 310 in the interlayer insulating layer 308 and connecting the connecting pad 306 on the base material 301 and the circuit pattern 311 on the interlayer insulating layer 308 via the conductor layer 309 in manufacturing the above printed wiring board 300 is as follows: However, to simplify description, only the upper constitution in the printed wiring board 300 will be described below.
That is, after the through hole 302, the conductor layer 303, the through hole land 304, the connecting pattern 305 and the connecting pad 306 are formed on the base material 301 by applying drilling, electroless plating, predetermined etching and filling resin to a double-sided copper-clad laminate, photosensitive resin is applied to the upper surface of the base material 301 and is dried so as to form the interlayer insulating layer 308, and the interlayer insulating layer 308 is exposed with the mask film not shown provided with a light blocking pattern corresponding to the via hole 310 and the circuit pattern 311 stuck on the interlayer insulating layer 308. After exposure, the mask film is peeled from the interlayer insulating layer 308 and development is performed. Hereby, the via hole 310 is formed. Further, plating catalytic nucleus is applied to the interlayer insulating layer 308, and the conductor layer 309 and the circuit pattern 311 are formed by electroless plating after the plating resist layer 312 is formed. Hereby, the connecting pad 306 is connected to the circuit pattern 311 via the conductor layer 309 and the printed wiring board 300 is manufactured.
If the via hole 332 is formed in the interlayer insulating layer 330 (the upper interlayer insulating layer) and the connecting pad 328 on the interlayer insulating layer 324 (the lower interlayer insulating layer) and the circuit pattern 333 on the interlayer insulating layer 330 are connected via the conductor layer 331 in the printed wiring board 320, basically the similar method to the above-mentioned is also used.
It depends upon whether the light blocking pattern of a mask film corresponding to the via holes 310 and 332 and the circuit patterns 311 and 333 can be set to a correct position of a portion in which a via hole is to be formed and a portion in which a circuit pattern is to be formed in the interlayer insulating layers 308 and 330 or not whether the via holes 310 and 332 are securely formed and the connecting pads 306 and 328 are reliably connected to the circuit patterns 311 and 333 via the conductor layers 309 and 331 or not.
However, as the shape of the connecting pads 306 and 328 are circular as that of the via holes 310 and 332 though allowable misregistration to some extent is set between the periphery of the connecting pads 306 and 328 and the periphery of the via holes 310 and 332 in the conventional printed wiring boards 300 and 320, the range of allowable misregistration in all directions is equal. Therefore, if a mask film is positioned exceeding the range of allowable misregistration in any direction on the interlayer insulating layers 308 and 330, the via holes 310 and 332 are not formed in a position in which they should be formed in the interlayer insulating layers 308 and 330 properly and as a result, the connecting pads 306 and 328 and the conductor layers 309 and 331 are not completely connected respectively and sufficient reliability of connection cannot be held or they may be disconnected.
Generally, the diameter of the connecting pads 306 and 328 is 200 xcexcm, while that of the via holes 310 and 332 is 100 xcexcm and therefore, positioning tolerance between the connecting pads 306 and 328 and the via holes 310 and 332 is only xc2x150 xcexcm and respective connection failure caused by this between the connecting pads 306 and 328 and the via holes 310 and 332 is considerably frequently caused.
As shown in FIG. 39, as the through hole land 304 and the connecting pad 306 are both circular and the through hole land 304 and the connecting pad 306 are connected via the connecting pattern 305, stress is always applied to the intersection of the through hole land 304 and the connecting pattern 305 and the intersection of the connecting pad 306 and the connecting pattern 305. Similarly, as shown in FIG. 40, as the conductor layer 325 of the via hole 326 and the connecting pad 328 are both circular and the conductor layer 325 and the connecting pad 328 are connected via the circuit pattern 327, stress is always applied to the intersection of the conductor layer 325 and the circuit pattern 327 and the intersection of the connecting pad 328 and the circuit pattern 327. Therefore, the interlayer insulating layers 308 and 330 which are respectively in contact with each intersection may be cracked in a heat cycle.
Further, in the conventional multilayer printed wiring boards 300 and 320, the connecting pads 306 and 328 are respectively connected to the conductor layers 309 and 331 only in either of the via hole 310 or 332 and therefore, if disconnection occurs in one of a large number of via holes which exist in the printed wiring boards 300 and 320, the printed wiring boards 300 and 320 themselves fail and there is a problem that yield is bad.
(4) The present invention is made to solve the above conventional problems and the first object is to provide a reliable printed wiring board wherein a circuit pattern provided on the upper surface of an interlayer insulating layer formed in a printed wiring board and a conductor pad can be securely connected without causing connection failure by arranging an opening existing around a conductor pad so that it is not overlapped with the conductor pad, by substantially equalizing the quantity of resin which fills an opening around a conductor pad and that of resin which fills another opening and by substantially equalizing the area of a plating resist formed in an opening around a conductor pad and that of a plating resist formed in another opening and to prevent peeling.
The second object of the present invention is to provide a printed wiring board which is a multilayer printed wiring board wherein a photosensitive interlayer insulating layer is formed on a base material on which a metallic area which functions as a power plane or a ground plane is formed, a conductor circuit is formed on the above interlayer insulating layer and the conductor circuit is connected to the above metallic area via a via hole formed in the interlayer insulating layer wherein a pad for connecting to the via hole is formed in the above metallic area, a blank portion is provided around the pad to separate the pad from the metallic area, the thickness of an interlayer insulating layer on the metallic area and a conductive pattern is uniformed and the resolution of exposure to the interlayer insulating layer on the metallic area is prevented from varying widely by electrically connecting the above pad to at least one point of the metallic area and a via hole securely exposing the metallic area can be formed by preventing light dispersed by the metallic area from being incident to an interlayer insulating layer existing under the mask area of a mask film where a pattern for forming a via hole is formed and its manufacturing method.
Further, the third object of the present invention is to provide a multilayer printed wiring board wherein even if misregistration is caused between a pad and a mask film when a via hole is formed by exposing and developing an interlayer insulating layer with a mask film stuck on the photosensitive interlayer insulating layer by devising the shape of a connecting pad formed on a base material or an interlayer insulating layer, the via hole and the pad can be stably connected reliably.
(1) To achieve the above first object, a printed wiring board according to the present invention is characterized by comprising a conductive pattern formed in a mesh on the single side or double sides of a base material and provided with plural openings in which no conductor exists, a conductor pad provided between the openings of the conductive pattern and a filled resin layer for filling each opening in that an opening existing around a conductor pad is arranged so that it is not overlapped with the conductor pad.
A printed wiring board according to the present invention is also characterized by comprising a conductive pattern formed in a mesh on the single side or double sides of a base material on which an adhesive layer for electroless plating is formed and provided with plural openings in which no conductor exists, a conductor pad provided between the openings of the conductive pattern and a plating resist formed in each opening in that an opening existing around a conductor pad is arranged so that it is not overlapped with the conductor pad.
Further, a printed wiring board according to the present invention is characterized in that the above conductor pad is a photovia land.
In a printed wiring board according to the present invention provided with the above constitution, an opening existing around a conductor pad which is a photovia land is arranged so that it is not overlapped with the conductor pad, therefore as the area of an opening existing around a conductor pad and that of another opening are equal, the quantity of resin which fills each opening is equal in the overall printed wiring board, and in other words, the quantity of resin overflowing from each opening when each opening is filled with resin can be uniformed in any opening. Hereby, the thickness of a filled resin layer formed in each opening is substantially equal, the quantity of resin overflowing from each opening can be uniformed in the overall printed wiring board and when the respective surfaces of a conductive pattern and a conductor pad are polished so that they are smooth, resin overflowing from an opening around the conductor pad is not left on the conductor pad. As a result, a circuit pattern provided on an interlayer insulating layer formed in a printed wiring board and a conductor pad can be securely connected without causing connection failure.
To form a conductive pattern in a mesh on the surface of an insulator for electroless plating which also functions as interlayer insulating material, a plating resist is required to be formed in an opening, however, this plating resist is not connected to another plating resist. Therefore, as its area which is in contact with an adhesive for electroless plating is smaller, a plating resist is readily peeled. In a printed wiring board according to the present invention, a plating resist is prevented from being peeled by arranging an opening existing around a conductor pad so that it is not overlapped with the conductor pad and minimizing the reduction of the area of a plating resist constituting an opening.
(2) To achieve the above second object, a printed wiring board according to the present invention which is a multilayer printed wiring board wherein a photosensitive interlayer insulating layer is formed on a base material on which a metallic area which functions as a power plane or a ground plane is formed, a conductor circuit is formed on the above interlayer insulating layer and the conductor circuit is connected to the above metallic area via a via hole formed in the interlayer insulating layer is characterized in that a pad for connecting to the via hole is formed in the above metallic area, a blank portion is provided around the pad to separate it from the metallic area and the above pad is electrically connected to at least one point of the metallic area. Further, in such a printed wiring board, a filled resin layer or a plating resist layer is formed in the above blank portion.
In a printed wiring board according to the present invention provided with the above constitution, if an interlayer insulating layer is exposed by radiating light from outside a mask film with the mask film stuck on the interlayer insulating layer to form a via hole opposite to a metallic area, the interlayer insulating layer on which light is radiated via the mask film is hardened and in the meantime, the interlayer insulating layer corresponding to a part in which light is blocked off by the mask area of the mask film is held unhardened without being hardened because light is not radiated on it.
At this time, as a blank portion provided with a filled resin layer in which no conductor exists or a plating resist layer is formed outside the metallic area constituting a power pattern or a ground pattern which is coated with the mask area of the mask film with the mask film stuck on the interlayer insulating layer, light transmitted in the mask film and the interlayer insulating layer in the vicinity of the mask area is radiated on the blank portion and light is not dispersed in the vicinity of the mask area. Therefore, light is efficiently prevented from being incident to the interlayer insulating layer existing under the mask area and the interlayer insulating layer under the mask area is held unhardened without being hardened. Hereby, if development is performed after exposure, no hardened film of the interlayer insulating layer is left on the metallic area and a via hole in which the metallic area is securely exposed can be formed.
As in the above printed wiring board, a filled resin layer or a plating resist layer is formed between the blank portion and a circuit pattern so that the upper surface of the filled resin layer or the plating resist layer is substantially as high as that of the metallic area, a photosensitive interlayer insulating layer can be formed on the blank portion, the circuit pattern and the filled resin layer so that the thickness of the interlayer insulating layer is substantially uniform throughout the base material. Therefore, when a via hole opposite to a connecting pad is formed by exposing light to the interlayer insulating layer via the mask film, the resolution of exposure is prevented from varying widely and the interlayer insulating layer can be exposed under the same exposure condition. Hereby, a via hole inside which a metallic area is completely exposed can be formed. The metallic area is connected to at least one point of a portion connected to a via hole in the metallic area (a connecting pad). Therefore, even if the blank portion exists, no function of a power plane or a ground plane is damaged.
Further, a method of manufacturing a printed wiring board according to the present invention is characterized in that in a method of manufacturing a multilayer printed wiring board wherein a photosensitive interlayer insulating layer is formed on a base material on which a metallic area which functions as a power plane or a ground plane is formed, a mask film where a pattern for forming a via hole is formed is formed and a hole for the via hole is formed by exposure and development and further, a conductor circuit and a via hole are formed, when a pad connected to a via hole in the metallic area is formed, a blank portion is provided around the pad to separate the pad from the metallic area and the above pad is electrically connected to at least one point of the metallic area. According to this manufacturing method, the above printed wiring board can be manufactured and therefore, the similar action and effect to the above-mentioned can be obtained.
A method of manufacturing the above printed wiring board is also characterized in that a blank portion is provided around a pad by etching a metallic area to separate the pad from the metallic area so that the pad is electrically connected to at least one point of the metallic area when the pad for connecting to a via hole in the above metallic area is formed, the blank portion is filled with resin and the filled resin layer is polished so that the level of the respective upper surfaces of the pad and the filled resin layer is equal. According to such a manufacturing method, as the blank portion is filled with resin, the level of the upper surface of a conductor circuit is equal to that of the filled resin layer and even if an interlayer insulating layer is formed on it, the thickness can be uniformed, a problems of insufficient development and excessive development caused by difference in thickness can be solved and a satisfactory hole for a via hole can be formed.
Further, a method of manufacturing a printed wiring board according to the present invention is characterized in that after a plating resist layer corresponding to a blank portion around a pad is formed so that the pad and a metallic area are electrically connected at least one point when the pad for connecting to a via hole in the above metallic area is formed, the metallic area and the pad are formed by electroless plating and the blank portion is provided around the pad to separate the pad from the metallic area. According to this manufacturing method, as a plating resist exists in the blank portion, the level of the upper surface of a conductor circuit can be equal to that of the plating resist layer.
(3) Further, to achieve the above third object, a multilayer printed wiring board according to the present invention is constituted so that a through hole land is in the shape of a tear and a via hole is connected at the narrower portion of the tear-shaped land based upon a multilayer printed wiring board wherein its core material is provided with a through hole, an interlayer insulating layer is formed on the core material, a via hole is formed in the interlayer insulating layer and the via hole and the through hole are electrically connected. In this multilayer printed wiring board, a through hole land is in the shape of a tear, as a via hole is connected in the through hole land, the through hole land and a pad for connecting to the via hole are integrated and therefore, the area for connection of the bottom of the via hole can be enlarged. Hereby, when an interlayer insulating layer which is formed on a core material and on which the mask film is stuck is exposed with the light blocking pattern of the mask film corresponding to a part in which the via hole is to be formed to form the via hole, the range of allowable misregistration of the light blocking pattern of the mask film to a part in which the via hole is to be formed is greatly widened and even if the pad and the mask film are dislocated in the direction of the narrower side of the tear-shaped pad if misregistration is caused between a pad and the master film, the via hole and the pad can be stably connected reliably. The narrower side of the tear-shaped pad means Y side in FIG. 17(A).
As a through hole land and a pad for connecting to a via hole are integrated as described above, there is no location at which stress is converged and an interlayer insulating layer can be also prevented from being cracked in a heat cycle.
A multilayer printed wiring board according to the present invention is constituted so that a land for a via hole provided in the above interlayer insulating layer is in the shape of a tear and the opening of the via hole is formed in a part in which the tear-shaped land is widened. In such a multilayer printed wiring board, a through hole land and a via hole land are both in the shape of a tear, as the opening of the via hole is formed in the enlarged part of such a land, an allowable range in which the opening of the via hole is formed on the pad is enlarged, compared with the case of the above printed wiring board, therefore the range of allowable misregistration of the light blocking pattern of the mask film to a part in which the via hole is to be formed is greatly widened and if misregistration is caused between the pad and the mask film, the via hole and the pad can be also stably connected reliably independent of the direction of misregistration, for example both on the narrower side and on the enlarged side of the tear shape. The enlarged side of the tear shape means X side in FIG. 17(A).
Further, a multilayer printed wiring board according to the present invention is constituted so that a land for a via hole provided in the above interlayer insulating layer is substantially elliptic and the opening of the via hole is formed at one end of the ellipse in the direction of the longer axis. In such a multilayer printed wiring board, a through hole land is in the shape of a tear, a via hole land is elliptic, therefore an allowable range for forming the opening of a via hole is further enlarged, compared with the case of the above printed wiring board, the range of allowable misregistration of the light blocking pattern of a mask film to a part in which the via hole is to be formed is greatly widened and hereby, if misregistration is caused between a pad and the mask film, the via hole and the pad can be also stably connected reliably independent of the direction of misregistration, for example both on the narrower side and on the enlarged side of the tear shape.
A multilayer printed wiring board according to the present invention is also constituted so that a land for a via hole provided in the above interlayer insulating layer is in the shape of a tear, the opening of the via hole is formed in the enlarged part and the via hole is electrically connected to the tear-shaped pad formed on the interlayer insulating layer. In such a multilayer printed wiring board, a land for the via hole and the tear-shaped pad are electrically connected on the interlayer insulating layer in addition to the above constitution and as the pad formed on the interlayer insulating layer is also in the shape of a tear as described above, the area for connection of the bottom of the via hole connected to the pad can be enlarged. Hereby, when an interlayer insulating layer which is formed on a core material and on which a mask film is stuck is exposed with the light blocking pattern of the mask film corresponding to a part in which a via hole is to be formed to form the via hole, the range of allowable misregistration of the light blocking pattern of the mask film to a part in which the via hole is to be formed is greatly widened and if misregistration is caused between a pad and the mask film, the via hole and the pad can be also stably reliably independent of the direction of misregistration, for example both on the narrower side and on the enlarged side of the tear shape.
Further, a multilayer printed wiring board according to the present invention is constituted so that a pad is substantially elliptic, a via hole for connecting to the upper conductor circuit is connected to one end of the ellipse in the direction of the longer axis, the other part functions as a part of a land for a via hole for connecting to the lower conductor circuit and constitution for connecting to the lower conductor circuit is provided based upon a multilayer printed wiring board wherein an interlayer insulating layer is formed on a base material on which the lower conductor circuit is formed, an intermediate layer conductor circuit including a pad is formed on the interlayer insulating layer, an interlayer insulating layer is further formed on the intermediate layer conductor circuit, the upper conductor circuit is formed on the interlayer insulating layer, the above lower and upper conductor circuits are electrically connected to the above pad a via hole provided in the interlayer insulating layer.
In such a multilayer printed wiring board, a land for a via hole for connecting to the lower conductor circuit and a pad for a via hole for connecting to the upper conductor circuit are continuously integrated and form an ellipse in which the opposite sides of an ellipse or a rectangle draw an arc outside, therefore there is no location to which stress is converged and an interlayer insulating layer can be also prevented from being cracked in a heat cycle. As the above printed wiring board, the area for connection of the bottom of a via hole can be enlarged and when an interlayer insulating layer which is formed on a base material and on which a mask film is stuck is exposed with the light blocking pattern of the mask film corresponding to a part in which a via hole is to be formed to form the via hole, the range of allowable misregistration of the light blocking pattern of the mask film to a part in which the via hole is to be formed is greatly widened and if misregistration is caused between a pad and the mask film, the via hole and the pad can be also stably connected reliably even if misregistration is caused in the direction of the narrower side of the tear-shaped pad.
A multilayer printed wiring board is also constituted so that a land for a via hole for connecting to the above upper conductor circuit is substantially in the shape of a tear and the opening of the via hole is formed at the enlarged part of the tear-shaped land. In such a multilayer printed wiring board, a pad for an intermediate layer conductor circuit is elliptic, a land for a via hole for connecting to the upper conductor circuit is in the shape of a tear, further as the opening of the via hole is formed in the enlarged part of the land, an allowable range for forming the opening of the via hole on the pad is further enlarged, compared with the case of the above printed wiring board, therefore the range of allowable misregistration of the light blocking pattern of the mask film to a part in which the via hole is to be formed is greatly widened and if misregistration is caused between the pad and the mask film, the via hole and the pad can be also stably connected reliably independent of the direction of misregistration, for example both on the narrower side and on the enlarged side of the tear shape.
Further, a multilayer printed wiring board according to the present invention is constituted so that a land for a via hole for connecting to the above upper conductor circuit is substantially elliptic and the opening of the via hole is formed at one end of the ellipse in the direction of the longer axis. In such a multilayer printed wiring board, a pad for an intermediate layer conductor circuit is elliptic, a land for a via hole for connecting to the upper conductor circuit is elliptic, further as the opening of the via hole is formed at one end of the ellipse of the land in the direction of the longer axis, an allowable range for forming the opening of the via hole is enlarged, the range of allowable misregistration of the light blocking pattern of the mask film to a part in which the via hole is to be formed is greatly widened and hereby, if misregistration is caused between the pad and the mask film, the via hole and the pad can be also stably connected reliably independent of the direction of misregistration, for example both on the narrower side and on the enlarged side of the tear shape.
A multilayer printed wiring board according to the present invention is also constituted so that a land for a via hole for connecting to the above upper conductor circuit is in the shape of a tear, the opening of the via hole is formed at the enlarged part, and the land is electrically connected to a tear-shaped pad formed on an interlayer insulating layer. In such a multilayer printed wiring board, a pad for an intermediate layer conductor circuit is elliptic in addition to the above constitution, a land for a via hole for connecting to the upper conductor circuit is in the shape of a tear and as the opening of the via hole is formed in the enlarged part, the area for connection of the bottom of the via hole connected to the pad can be enlarged. Hereby, when an interlayer insulating layer which is formed on a base material and on which a mask film is stuck is exposed with the light blocking pattern of the mask film corresponding to a part in which a via hole is to be formed to form the via hole, the range of allowable misregistration of the light blocking pattern of the mask film to a part in which the via hole is to be formed is greatly widened and if misregistration is caused between a pad and the mask film, the via hole and the pad can be also stably connected reliably even if misregistration is caused in the direction of the narrower side of the tear-shaped pad.
Further, a multilayer printed wiring board according to the present invention is constituted so that a pad and a land are in the shape of a tear and they are connected each other on the narrower side of the tear shape based upon a multilayer printed wiring board wherein an interlayer insulating layer is formed on a core material on which the lower conductor circuit is formed, an intermediate layer conductor circuit is formed on the interlayer insulating layer, an interlayer insulating layer is further formed on the intermediate layer conductor circuit, the upper conductor circuit is formed on the interlayer insulating layer, a land for a via hole for connecting to the lower conductor circuit and a pad for connecting to the upper conductor circuit are provided to the above intermediate layer conductor circuit and the above land and the pad are electrically connected. In such a multilayer printed wiring board, as a pad connected to the upper conductor circuit formed on the intermediate layer conductor circuit and a land for a via hole for connecting to the lower conductor circuit are both in the shape of a tear and each pad and the land are connected each other on the narrower side, the area for connection of the bottom of the via hole connected to a pad can be enlarged. Hereby, when an interlayer insulating layer which is formed on a base material and on which a mask film is stuck is exposed with the light blocking pattern of the mask film corresponding to a part in which a via hole is to be formed to form the via hole, the range of allowable misregistration of the light blocking pattern of the mask film to a part in which the via hole is to be formed is greatly widened and if misregistration is caused between a pad and the mask film, the via hole and the pad can be also stably connected reliably even if misregistration is caused in the direction of the narrower side of the tear-shaped pad. Stress is hardly converged to a connection in which the pad and the land are connected each other and hereby, an interlayer insulating layer can be also prevented from being cracked in a heat cycle.
A multilayer printed wiring board according to the present invention is also constituted so that a land for a via hole is in the shape of a tear and the opening of the via hole is formed in the enlarged part based upon a multilayer printed wiring board wherein an interlayer insulating layer is formed on a base material on which the lower conductor circuit is formed, the upper conductor circuit is formed on the interlayer insulating layer and the above lower and upper conductor circuits are electrically connected via a via hole provided in an interlayer insulating layer. In such a multilayer printed wiring board, when an interlayer insulating layer which is formed on a base material and on which a mask film is stuck is exposed with the light blocking pattern of the mask film corresponding to a part in which the via hole is to be formed to form the via hole because a land for a via hole is in the shape of a tear and the opening of the via hole is formed on the enlarged part of the tear shape, the range of allowable misregistration of the light blocking pattern of the mask film to a part in which the via hole is to be formed is greatly widened and if the misregistration of the mask film is caused, the opening of the via hole can be also formed in the enlarged part of the tear-shaped land independent of the direction of misregistration. Stress is hardly converged to a connection between the land and the upper conductor circuit and hereby, an interlayer insulating layer can be also prevented from being cracked in a heat cycle.
Further, a multilayer printed wiring board according to the present invention is constituted so that plural via holes are collected based upon the above multilayer printed wiring board. In such a multilayer printed wiring board, as plural via holes share a land and are collected, secure connection is enabled via the residual via holes even if some via holes are disconnected and the probability of disconnection can be greatly reduced. A plating resist can be prevented from being left after development in the intersection of a circuit pattern and a pad by forming the pad and a land in the shape of a tear as described above. Further, as the area of the pad and the land can be increased, the strength of sticking can be enhanced by the increase of a stuck area. In addition, these effects can be realized without increasing dead space between wiring patterns and are useful in manufacturing a high density wiring board.